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  cystech electronics corp. spec. no. : c820t3 issued date : 2007.07.09 revised date : page no. : 1/ 4 BTD1805BT3 cystek product specification low vcesat npn epitaxial planar transistor BTD1805BT3 description the device is manufactured in npn planar technology by using a ?base island? layout. the resulting transistor shows exceptional high gain performance coupled with very low saturation voltage. features ? very low collector-to-emitter saturation voltage ? fast switching speed ? high current gain characteristic ? large current capability ? pb-free package applications ? ccfl drivers ? voltage regulators ? relay drivers ? high efficiency low voltage switching applications symbol outline BTD1805BT3 b base c collector e emitter to-126 b c e
cystech electronics corp. spec. no. : c820t3 issued date : 2007.07.09 revised date : page no. : 2/ 4 BTD1805BT3 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit collector-base voltage (i e =0) v cbo 170 v collector-emitter voltage (i b =0) v ceo 60 v emitter-base voltage (i c =0) v ebo 8 v collector current (dc) i c 5 collector current (pulse) i cp 10 (note 1) a base current i b 2 a power dissipation @ t a =25 p d 1.5 power dissipation @ t c =25 p d 20 w thermal resistance, junction to ambient r ja 83.3 c/w thermal resistance, junction to case r jc 6.25 c/w junction temperature tj 150 c storage temperature tstg -55~+150 c note : 1. single pulse , pw Q 380 s,duty Q 2%. characteristics (ta=25 c) symbol min. typ. max. unit test conditions bv cbo 170 - - v i c =100 a, i e =0 *bv ceo 60 - - v i c =1ma, i b =0 bv ebo 8 - - v i c =100 a, i c =0 i cbo - - 0.1 a v cb =170v, i e =0 i ebo - - 0.1 a v eb =8v, i c =0 *v ce(sat) 1 - - 50 mv i c =100ma, i b =5ma *v ce(sat) 2 - 190 250 mv i c =2a, i b =50ma *v ce(sat) 3 - 230 300 mv i c =3a, i b =150ma *v ce(sat) 4 - - 400 mv i c =5a, i b =200ma *v be(sat) - 0.9 1 v i c =2a, i b =100ma *h fe 1 200 - 400 - v ce =2v, i c =100ma *h fe 2 120 - - - v ce =2v, i c =5a *h fe 3 40 - - - v ce =2v, i c =10a f t - 150 - mhz v ce =10v, i c =50ma cob - 50 - pf v cb =10v, f=1mhz t on - 50 - ns t stg - 1.35 2.5 s t f - 120 1000 ns v cc =30v, i c =10i b 1=-10i b 2=1a, r l =30 *pulse test : pulse width 380 s, duty cycle 2%
cystech electronics corp. spec. no. : c820t3 issued date : 2007.07.09 revised date : page no. : 3/ 4 BTD1805BT3 cystek product specification characteristic curves current gain vs collector current 100 1000 1 10 100 1000 10000 collector current---ic(ma) current gain---hfe vce=1v vce=2v saturation voltage vs collector current 1 10 100 1000 1 10 100 1000 10000 collector current---ic(ma) saturation voltage---(mv) ic=10ib ic=40ib ic=100ib vcesat saturation voltage vs collector current 100 1000 10000 1 10 100 1000 10000 collector current---ic(ma) saturation voltage---(mv) vbesat@ic=10ib on voltage vs collector current 100 1000 1 10 100 1000 10000 collector current---ic(ma) on voltage---(mv) vbeon@vce=1v power derating curve 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0 50 100 150 200 ambient temperature---ta() power dissipation---pd(w) power derating curve 0 5 10 15 20 25 0 50 100 150 200 case temeprature---tc() power dissipation---pd(w)
cystech electronics corp. spec. no. : c820t3 issued date : 2007.07.09 revised date : page no. : 4/ 4 BTD1805BT3 cystek product specification to-126 dimension *: typical a b c f d e h 1 2 3 k j i 3 4 l m 1 2 g marking: d1805 style: pin 1.base 2.collector 3.emitter 3-lead to-126 plastic package cystek packa g e code: t3 inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. 1 - *3 - *3 f 0.0280 0.0319 0.71 0.81 2 - *3 - *3 g 0.0480 0.0520 1.22 1.32 3 - *3 - *3 h 0.1709 0.1890 4.34 4.80 4 - *3 - *3 i 0.0950 0.1050 2.41 2.66 a 0.1500 0.1539 3.81 3.91 j 0.0450 0.0550 1.14 1.39 b 0.2752 0.2791 6.99 7.09 k 0.0450 0.0550 1.14 1.39 c 0.5315 0.6102 13.50 15.50 l - *0.0217 - *0.55 d 0.2854 0.3039 7.52 7.72 m 0.1378 0.1520 3.50 3.86 e 0.0374 0.0413 0.95 1.05 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: 42 alloy; solder plating ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0 important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .


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